nju7325 - 1 - single-phase dc brushless motor driver ic ? general description ? package outline ? features ? single supply ? operating voltage v dd =2.4 to 5.5v ? low operating current ? low saturation output voltage vsat= 0.35v @io= 250ma ? cmos technology ? package outline msop8 (vsp8)*, ms op8 (tvsp8)**, dfn8-v1(eson8-v1) *meet jedec mo-187-da, **meet jedec mo-187-da / thin type ? block diagram the nju7325 is a dual power amplifier designed for small actuator applications. it incorporates mos-fet transistor in the output stage which can offer a low saturation output voltage in high current operation. the nju7325 is available in small and thin surface mount packages msop8 (vsp8), msop8 (tvsp8) and eson8-v1, which provides downsizing and thinning in motor applications. 4 2 3 8 5 6 1 7 - + + - ac h bch nju7325kv1 (dfn8-v1(eson8-v1)) nju7325r (msop8(vsp8)) nju7325rb1 (msop8(tvsp8))
nju7325 - 2 - ? absolute maximum ratings (ta=25 c) parameter symbol ratings unit note supply voltage v dd +7 v - input voltage vid -0.3 to v dd +0.3 v - operating temperature topr -40 to +85 c - storage temperature tstg -50 to +150 c - power dissipation (msop8(vsp8/tvsp8)) p d 400 mw device itself 520 mw (*1)mounted on 2-layers board power dissipation (dfn8-v1(eson8-v1)) p d 1100 mw (*2)mounted on 4-layers board (*1): mounted on glass epoxy board based on eia/jedec. (101.5 114.5 1.6mm: 2-layers) (*2): mounted on glass epoxy board based on eia/jedec. (101.5 114.5 1.6mm: 4-layers internal foil area: 99.5 99.5mm) ? electrical characteristics (v dd =5v, v ss =0v, f=1khz, ta=25 c) parameter symbol test condition min. typ. max. unit operating voltage range v dd 2.4 5.0 5.5 v quiescent current i dd no load condition, voltage follower, vo=2.5v, per 1ch - 3.0 4.0 ma input offset voltage v io -15 - +15 mv input offset current i io - 10 - pa input bias current i ib - 10 - pa input impedance r in - 10 12 - ? input common mode voltage range v icm 0.4 to 4.0 - - v io= +250ma 4.55 4.65 - v maximum output voltage range v om io= -250ma - 0.35 0.45 v large signal voltage gain av 55 - - db common mode rejection ratio cmrr v icm =0.4 to 4.0v 53 - - db supply voltage rejection ratio psrr v dd =4.5 to 5.5v 55 - - db unity gain bandwidth f t c l =10pf, open loop - 1.5 - mhz slew rate sr voltage follower, r l =16.5 ? - 1 - v/us (*3): oscillation margin of nju7325 will be narrow if the application features light load current and low gain. (ex. voltage follower). maintain the value of stray capacitance at the output te rminal with less than 100pf to prevent the oscillation. (*4): place decoupling-capacitor near vss and v dd pins.
nju7325 - 3 - ? pin configuration ? msop8 (vsp8/tvsp8) ? dfn8-v1(eson8-v1) (*5): the pad in the center part on the back is connected with the internal v dd , therefore it is open or connects to v dd . surface backside 1 2 3 4 8 7 6 5 surface 1 2 3 4 8 7 6 5 1: a output 2: a - input 3: a+ input 4: v ss 5: b+ input 6: b - input 7: b output 8: v dd 8 7 6 5 1 2 3 4 1: a output 2: a - input 3: a+ input 4: v ss 5: b+ input 6: b - input 7: b output 8: v dd
nju7325 - 4 - ? application circuit [caution] the specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. the application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. 4 2 3 8 5 6 1 7 - + + - ach bch m v dd v ss
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